Featur
Featur & Benefits
- Ultra-low capacitance (0.05pF t.) ideal for high speed data applications
- Provid D protection with fast rponse time (<1ns) allowing equipment to p IEC 61000-4-2 level 4 tt
- Single-line, bi-directional device for placement flexibility
- Low profile 0402/1005 dign for board space savings
- Low leakage current (<0.1nA t.) reduc power con
Environmental Specifications:
- Load Humidity: 12VDC per EIA/IS-772 Para. 4.4.2, +85°C, 85% RH for 1000hours
- Thermal Shock: EIA/IS-722 Para 4.6, Air to Air -55°C to +125°C, 5 cycl
- Moisture Ristance Tt: MIL-STD-202G Method 106G, 10 cycl
- Mechanical Shock: EIA/IS-722 Para. 4.9
- Vibration: EIA/IS-722 Para. 4.10
- Ristance to Solvent: EIA/ IS -722 Para. 4.11
- Operating & Storage Temperature Range: -55°C to +125°C
Soldering Recommendations
- Compatible with lead and lead-free solder reflow procs
- Peak reflow temperatur and durations:
- IR Reflow = 260°C max for 10 sec. max.
- Wave Solder = 260°C max
Digned Considerations
The location in the circuit for the MLP seri has to be carefully determined. For better performance, the device should be placed as close to the signal input as possible and ahead of any other component. Due to the high current ociated with an D event, it is recommended to use a “0-stub” pad dign (pad directly on the signal/data line and second pad directly on common ground).
